Microcontrollers are semiconductor integrated circuits incorporated in equipment such as home electric appliances, AV devices, mobile phones, automobiles, and industrial machines and carry out processing in accordance with programs stored in memories, thereby controlling the respective equipment.
In automobiles, failure of a control device may lead to an accident. Therefore, components including microcontrollers are required to have a high reliability and also are designed so that a safety function works when failure occurs so as to detect the failure and prevent a dangerous situation of the automobile. The microcontrollers have to diagnose sensors and actuators and detect failure of the sensors and actuators, in addition, the microcontrollers have to detect failure of the microcontrollers itself.
There are various methods for failure detection of the microcontrollers, and a method that uses dual CPU and causes them to carry out the same processing, and always compares the values of buses is often used. “Fault Tolerance Achieved in VLSI,” IEEE MICRO, December 1984 (Non-Patent Document 1) describes a method in which a master CPU and a CPU for comparison carry out the same processing at the same time, and the results thereof are compared by a comparator circuit.
In Japanese Patent Application Laid-Open Publication No. 10-261762 (Patent Document 1), technique of providing two memories and two CPUs, and comparing input/output signals of the CPUs is described. More specifically, in a dual-core microcontroller described in Patent Document 1, a first CPU, which executes commands and carries out processing such as calculations and data transfer, and a first memory, which stores the commands executed by and data-processed by the first CPU, are connected to a first bus; similarly, a second CPU, which executes commands and carries out processing such as calculations and data transfer, and a second memory, which stores the commands executed by and data-processed by the second CPU, are connected to a second bus. The first CPU and the second CPU are operated so as to be completely synchronized with each other and carry out the same processing, a comparator compares the state of the first bus and the second bus, the comparison results thereof can be monitored from outside, and unmatched comparison results generate interrupt signals in the first CPU and the second CPU.